Welcome to the HPDcache User Guide

Contents:

• Overview
  • List of features
• Parameters, Interfaces and Communication Protocols
  • Synthesis-time (Static) Configuration Parameters
  • Conventions
  • Global Signals
  • Cache-Requesters Interface
  • Cache Memory Interfaces
  • Interfaces’ requirements
  • Cache-Requesters Interface (CRI) Attributes
  • Cache-Memory Interface (CMI) Attributes
  • Event signals
• Architecture
  • Cache Controller
  • Cache Directory and Data
  • Miss Handler
  • Uncacheable Handler
  • Cache Management Operation (CMO) Handler
  • Replay Table (RTAB)
  • Write-buffer
• Control-Status Registers (CSRs)
  • Dedicated CSR address space
  • Configuration registers
  • Performance counters
• Atomic Memory Operations (AMOs)
  • Background
  • Supported AMOs
  • Implementation
  • AMO ordering
  • LR/SC support
• Cache Management Operations (CMOs)
  • Memory Write Fence
  • Invalidate a Cacheline Given its Address
  • Invalidate All Cachelines
  • Prefetch a Cacheline given its Address
• References